Crate moa_core

Modules

AddressRepeater
An address adapter that repeats the address space of the subdevice over the given range
AddressTranslator
An address adapter that uses a closure to translate the address before accessing the subdevice
Bus
A bus-like collection of Addressable Devices mapped to different address ranges
BusPort
An adapter for limiting the access requests of a device (eg. CPU) on a Bus to the address and data widths of the device
ClockDuration
Represents a duration of time in femtoseconds
ClockTime
Represents time from the start of the simulation
Debugger
Device
EdgeSignal
Frequency
Represents a frequency in Hz
InterruptController
MemoryBlock
A contiguous block of Addressable memory, backed by a Vec
ObservableEdgeSignal
ObservableSignal
Signal
System

Addressable
A device that can be addressed to read data from or write data to the device.
Debuggable
A device (cpu) that can debugged using the built-in debugger
Inspectable
A device (peripheral) that can inspected using the built-in debugger
Interruptable
A device that can receive an interrupt. The interrupt_state_change() method will be called whenever an interrupt signal changes goes high or low.
Observable
Steppable
A device that can change state over time. The step() method will be called by the containing System when the system clock advances. If an error occurs with any device, the on_error() method will be called to display any state information that might be helpful for debugging.
Transmutable